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(parent: 68eb1a4) | patch
x86/HVM: adjust feature checking in MSR intercept handling
authorJan Beulich <jbeulich@suse.com>
Wed, 7 Sep 2016 10:35:40 +0000 (12:35 +0200)
committerJan Beulich <jbeulich@suse.com>
Wed, 7 Sep 2016 10:35:40 +0000 (12:35 +0200)
commit6e0815a8d75f1cb90f84894346f9261814d7453a
tree5f08dc0f8d60e8b16ac60ef3ba6ed74e9acbb747tree | snapshot
parent68eb1a4d92be58e26bd11d02b8e0317bd56294accommit | diff
x86/HVM: adjust feature checking in MSR intercept handling

Consistently consult hvm_cpuid(). With that, BNDCFGS gets better
handled outside of VMX specific code, just like XSS. Don't needlessly
check for MTRR support when the MSR being accessed clearly is not an
MTRR one.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
xen/arch/x86/hvm/hvm.c diff | blob | history
xen/arch/x86/hvm/vmx/vmx.c diff | blob | history
xen/include/asm-x86/hvm/hvm.h diff | blob | history
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